Characterizing flash memory: anomalies, observations, and applications
Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture
Extract and infer quickly: Obtaining sector geometry of modern hard disk drives
ACM Transactions on Storage (TOS)
Hydra: A Block-Mapped Parallel Flash Memory Solid-State Disk Architecture
IEEE Transactions on Computers
Empirical analysis on energy efficiency of flash-based SSDs
HotPower'08 Proceedings of the 2008 conference on Power aware computing and systems
FlashPower: a detailed power model for NAND flash memory
Proceedings of the Conference on Design, Automation and Test in Europe
An evaluation of different page allocation strategies on high-speed SSDs
HotStorage'12 Proceedings of the 4th USENIX conference on Hot Topics in Storage and File Systems
BVSSD: build built-in versioning flash-based solid state drives
Proceedings of the 5th Annual International Systems and Storage Conference
Power-reduction techniques for data-center storage systems
ACM Computing Surveys (CSUR)
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In this work, we perform µsec time scale analysis on energy consumption behavior of the SSD Write operation and exploit this information to extract key technical characteristics of SSD internals: channel utilization policy, page allocation strategy, cluster size, channel switch delay, way switch delay, etc. We found that some SSDs adopt a multi-page cluster as a write unit instead of a page. We found that SSDs adopt significantly different ways of exploiting channel-level and way-level parallelism to maximize write throughput, which governs the peak current consumption. The X25M(Intel) emphasizes the performance aspect of SSDs and linearly increases the channel parallelism as the IO size increases. The MXP(Samsung) puts more emphasis on energy consumption aspect of SSD and controls the degree of parallelism to reduce the peak current consumption. Cluster size of the X25M and the MXP correspond to one and eight pages, respectively. The current consumed when writing a page to NAND flash varies significantly depending on the NAND model(17 mA-35 mA).