Power exploration for data dominated video applications
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
IEEE Transactions on Computers
A formal method for hardware IP design and integration under I/O and timing constraints
ACM Transactions on Embedded Computing Systems (TECS)
Diversity Control and Multi-Parent Recombination for Evolutionary Graph Coloring Algorithms
EvoCOP '09 Proceedings of the 9th European Conference on Evolutionary Computation in Combinatorial Optimization
Adaptive scratch pad memory management for dynamic behavior of multimedia applications
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Using data compression for increasing memory system utilization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Efficient system-level prototyping of power-aware dynamic memory managers for embedded systems
Integration, the VLSI Journal - Special issue: Low-power design techniques
A study of dynamic memory management in C++ programs
Computer Languages, Systems and Structures
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Electronic embedded systems designers aim at finding a tradeoff between cost and power consumption. As cache memory management has been shown to have a significant impact on power consumption, this paper addresses dynamic memory allocation for embedded systems with a special emphasis on time performance. In this work, time is split into time intervals, into which the application to be implemented by the embedded system requires accessing to data structures. The proposed iterative metaheuristics aim at determining which data structure should be stored in cache memory at each time interval in order to minimize reallocation and conflict costs. These approaches take advantage of metaheuristics previously designed for a static memory allocation problem.