Power Consumption Modeling and Characterization of the TI C6201

Authors:
Nathalie Julien;Johann Laurent;Eric Senn;Eric Martin
Affiliations:
Lester Laboratory, University of South Brittany;Lester Laboratory, University of South Brittany;Lester Laboratory, University of South Brittany;Lester Laboratory, University of South Brittany
Venue:
IEEE Micro
Year:
2003

Citing 0
Cited 14

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Abstract

This new approach characterizes power dissipation on complex DSPs. Its processor model relies on an initial functional-level power analysis of the target processor together with a characterization that qualifies the more significant architectural and algorithmic parameters for power dissipation. These parameters come from a simple profiling of the assembly code. This functional model accounts for deeply pipelined, superscalar, and hierarchical memory architectures.