Creation of ESL power models for communication architectures using automatic calibration

  • Authors:
  • Stefan Schürmans;Diandian Zhang;Dominik Auras;Rainer Leupers;Gerd Ascheid;Xiaotao Chen;Lun Wang

  • Affiliations:
  • RWTH Aachen University, Germany;RWTH Aachen University, Germany;RWTH Aachen University, Germany;RWTH Aachen University, Germany;RWTH Aachen University, Germany;Huawei Technologies Co., Ltd., Bridgewater, NJ;Huawei Technologies Co., Ltd., Bridgewater, NJ

  • Venue:
  • Proceedings of the 50th Annual Design Automation Conference
  • Year:
  • 2013

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Abstract

Power consumption is an important factor in chip design. The fundamental design decisions drawn during early design space exploration at electronic system level (ESL) have a large impact on the power consumption. This requires to estimate power already at ESL, which is usually not possible using standard ESL component libraries due to missing power models. This work proposes a methodology that allows extension of ESL models with a power model and to automatically calibrate it to match a power trace obtained by gate-level simulation or measurements. Two case studies show that the methodology is suitable even for complex communication architectures.