Power analysis of embedded software: a first step towards software power minimization
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
The design and use of simplepower: a cycle-accurate energy estimation tool
Proceedings of the 37th Annual Design Automation Conference
JouleTrack: a web based tool for software energy profiling
Proceedings of the 38th annual Design Automation Conference
EURASIP Journal on Applied Signal Processing
Energy-performance Exploration of a CGA-based SDR Processor
Journal of Signal Processing Systems
Scenario Based Mapping of Dynamic Applications on MPSoC: A 3D Graphics Case Study
SAMOS '09 Proceedings of the 9th International Workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation
A High-level Microprocessor Power Modeling Technique Based on Event Signatures
Journal of Signal Processing Systems
A high level SoC power estimation based on IP modeling
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
GREENCOM-CPSCOM '10 Proceedings of the 2010 IEEE/ACM Int'l Conference on Green Computing and Communications & Int'l Conference on Cyber, Physical and Social Computing
Power/energy estimator for designing WSN nodes with ambient energy harvesting feature
EURASIP Journal on Embedded Systems - Special issue on networked embedded systems for energy management and buildings
Energy estimator for weather forecasts dynamic power management of wireless sensor networks
PATMOS'11 Proceedings of the 21st international conference on Integrated circuit and system design: power and timing modeling, optimization, and simulation
An FPGA power aware design flow
PATMOS'06 Proceedings of the 16th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
An efficient power estimation methodology for complex RISC processor-based platforms
Proceedings of the great lakes symposium on VLSI
Creation of ESL power models for communication architectures using automatic calibration
Proceedings of the 50th Annual Design Automation Conference
QAML: a multi-paradigm DSML for quantitative analysis of embedded system architecture models
Proceedings of the 6th International Workshop on Multi-Paradigm Modeling
System-level power estimation tool for embedded processor based platforms
Proceedings of the 6th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools
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A high-level consumption estimation methodology and its associated tool, SoftExplorer, are presented. The estimation methodology uses a functional modeling of the processor combined with a parametric model to allow the designer to estimate the power consumption when the embedded software is executed on the target. SoftExplorer uses as input the assembly code generated by the compiler; its efficiency is compared to SimplePower's approach. Results for different processors (TI C62, C67, C55 and ARM7) and for several DSP applications provide an average error less than 5%.