Complete sets of transformations for general E-unification
Theoretical Computer Science - Second Conference on Rewriting Techniques and Applications, Bordeaux, May 1987
Term rewriting and all that
Fast out-of-order processor simulation using memoization
Proceedings of the eighth international conference on Architectural support for programming languages and operating systems
Denali: a goal-directed superoptimizer
PLDI '02 Proceedings of the ACM SIGPLAN 2002 Conference on Programming language design and implementation
Asim: A Performance Model Framework
Computer
A retargetable microcode generation system for a high-level microprogramming language
MICRO 14 Proceedings of the 14th annual workshop on Microprogramming
The microprogramming of pipelined processors
ISCA '77 Proceedings of the 4th annual symposium on Computer architecture
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
An FPGA-based Pentium® in a complete desktop system
Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays
High-Level Synthesis: from Algorithm to Digital Circuit
High-Level Synthesis: from Algorithm to Digital Circuit
Processor Description Languages
Processor Description Languages
Generalized instruction selector generation: the automatic construction of instruction selectors from descriptions of compiler internal forms and target machines
Compiling high throughput network processors
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
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We present a high-level synthesis technique that takes as input two orthogonal descriptions: (a) a behavioral architectural contract between the implementation and the user, and (b) a microarchitecture on which the architectural contract can be implemented. We describe a prototype compiler that generates control required to enforce the contract, and thus, synthesizes the pair of descriptions to hardware.