A fast algorithm for computing multiplicative inverses in GF(2m) using normal bases
Information and Computation
Identity-Based Encryption from the Weil Pairing
CRYPTO '01 Proceedings of the 21st Annual International Cryptology Conference on Advances in Cryptology
Unbelievable Security. Matching AES Security Using Public Key Systems
ASIACRYPT '01 Proceedings of the 7th International Conference on the Theory and Application of Cryptology and Information Security: Advances in Cryptology
The Weil Pairing, and Its Efficient Calculation
Journal of Cryptology
Efficient pairing computation on supersingular Abelian varieties
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An Introduction to Mathematical Cryptography
High Speed Compact Elliptic Curve Cryptoprocessor for FPGA Platforms
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Reconfigurable Computing Approach for Tate Pairing Cryptosystems over Binary Fields
IEEE Transactions on Computers
On Software Parallel Implementation of Cryptographic Pairings
Selected Areas in Cryptography
Faster $\mathbb{F}_p$-Arithmetic for Cryptographic Pairings on Barreto-Naehrig Curves
CHES '09 Proceedings of the 11th International Workshop on Cryptographic Hardware and Embedded Systems
Designing an ASIP for Cryptographic Pairings over Barreto-Naehrig Curves
CHES '09 Proceedings of the 11th International Workshop on Cryptographic Hardware and Embedded Systems
Fast Architectures for the \eta_T Pairing over Small-Characteristic Supersingular Elliptic Curves
IEEE Transactions on Computers
High-speed software implementation of the optimal ate pairing over Barreto-Naehrig curves
Pairing'10 Proceedings of the 4th international conference on Pairing-based cryptography
Compact hardware for computing the tate pairing over 128-bit-security supersingular curves
Pairing'10 Proceedings of the 4th international conference on Pairing-based cryptography
High speed flexible pairing cryptoprocessor on FPGA platform
Pairing'10 Proceedings of the 4th international conference on Pairing-based cryptography
Pairing-Friendly elliptic curves of prime order
SAC'05 Proceedings of the 12th international conference on Selected Areas in Cryptography
Efficient Hardware Implementation of Fp-Arithmetic for Pairing-Friendly Curves
IEEE Transactions on Computers
IEEE Transactions on Information Theory
Optimal eta pairing on supersingular genus-2 binary hyperelliptic curves
CT-RSA'12 Proceedings of the 12th conference on Topics in Cryptology
Core based architecture to speed up optimal ate pairing on FPGA platform
Pairing'12 Proceedings of the 5th international conference on Pairing-Based Cryptography
Faster pairing coprocessor architecture
Pairing'12 Proceedings of the 5th international conference on Pairing-Based Cryptography
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This paper presents an efficient architecture for computing cryptographic ηT pairing for providing 128-bit security. A cryptoprocessor is proposed for Miller's Algorithm with a new 1223-bit Karatsuba multiplier that exploits parallelism. To the best of our knowledge this is the first hardware implementation of 128-bit secure ηT pairing on supersingular elliptic curves over characteristic two fields. The design has been implemented on Xilinx FPGAs. The place-and-route results show that the proposed design takes only 190µs to complete an 128-bit secure ηT pairing on a Virtex-6 FPGA. The proposed cryptoprocessor achieves eight times speedup compared to the best known existing design. It also outperforms the previous designs with respect to area × time product.