Modeling the Effect of Technology Trends on the Soft Error Rate of Combinational Logic
DSN '02 Proceedings of the 2002 International Conference on Dependable Systems and Networks
Accurate Reliability Evaluation and Enhancement via Probabilistic Transfer Matrices
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Reliability-Centric Hardware/Software Co-Design
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
How should software reliability engineering (SRE) be taught?
ACM SIGSOFT Software Engineering Notes
Teaching reliability engineering to working engineers
FIE '00 Proceedings of the 30th Annual Frontiers in Education - Volume 02
Software Reliability Engineering: A Roadmap
FOSE '07 2007 Future of Software Engineering
Tracking Uncertainty with Probabilistic Logic Circuit Testing
IEEE Design & Test
Enhancing design robustness with reliability-aware resynthesis and logic simulation
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Analysis of defect tolerance in molecular electronics using information-theoretic measures
NANOARCH '07 Proceedings of the 2007 IEEE International Symposium on Nanoscale Architectures
Thermally-induced soft errors in nanoscale CMOS circuits
NANOARCH '07 Proceedings of the 2007 IEEE International Symposium on Nanoscale Architectures
An Analysis of Internal Parameter Variations Effects on Nanoscaled Gates
IEEE Transactions on Nanotechnology
| Hi-index | 0.00 |
Fast-shrinking dimensions of semiconductor devices are expected to reach sub-10 nm scale in a few years. Although smaller in size and lower in power consumption than today's CMOS devices, the nanoscaled devices are much less reliable due to manufacturing imperfections (hard errors), and noise and radiation-induced faults (soft errors). Consequently, in addition to timing, area, and power, the reliability has to become a new design criterion. This also means that the topic of reliability has to be incorporated into the circuit design curriculum. In this paper, we propose a course on circuit reliability. We also present in detail, an automated tool for calculation of reliability which could be incorporated into the course as a means for active learning.