Reduce SW/HW migration efforts by a RTOS in Multi-FPGA systems

  • Authors:
  • Bo Zhou;Yonghui Chen;Weidong Qiu;Yan Chen;Chenglian Peng

  • Affiliations:
  • Department of Computer and Information Technology, Fudan University, Shanghai, China;Department of Computer and Information Technology, Fudan University, Shanghai, China;Department of Computer and Information Technology, Fudan University, Shanghai, China;Department of Computer and Information Technology, Fudan University, Shanghai, China;Department of Computer and Information Technology, Fudan University, Shanghai, China

  • Venue:
  • CSCWD'05 Proceedings of the 9th international conference on Computer Supported Cooperative Work in Design II
  • Year:
  • 2005

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Abstract

The boundary between software and hardware is becoming blurry in modern embedded systems, especially in reconfigurable computing systems. It makes an easy-to-use design space explorer more important than ever for engineers. This paper proposes a RTOS (Real-Time Operating System) to reduce design efforts while migrating functions between software and hardware. The RTOS provides reconfigurable hardware threads with identical API interfaces and data structures, just like those for software threads. To utilize reconfigurable resources efficiently, the states of threads are controlled and managed by the RTOS. Threads can also be preconfigured according to static DFGs (data flow graphs). Experiments on the Rhealstone benchmark have shown that multi-thread environments provided by the proposed RTOS can extend the scale of traditional operating systems and give designers more freedom to perform design space exploration.