Branch-and-bound placement for building block layout
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Rectangle-packing-based module placement
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
TCG: a transitive closure graph-based representation for non-slicing floorplans
Proceedings of the 38th annual Design Automation Conference
TCG-S: orthogonal coupling of P*-admissible representations for general floorplans
Proceedings of the 39th annual Design Automation Conference
Fixed-Outline Floorplanning through Better Local Search
ICCD '01 Proceedings of the International Conference on Computer Design: VLSI in Computers & Processors
Module packing based on the BSG-structure and IC layout applications
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An improved algorithm for sequence pair generation
ICCS'06 Proceedings of the 6th international conference on Computational Science - Volume Part I
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Sequence Pair (SP) is an elegant representation for the block placement of IC Design, and it is usually imperative to generate the SP from an existing placement. A quick generation method and one concise algorithm are proposed instead of the original unfeasible one. It is also shown that if the relations of any two blocks are either vertical or horizontal, the solution space size of a representation is (n!)2 if it is P*-admissible. The analytical and experimental results of the algorithm both show its superiority in running time.