On using locking caches in embedded real-time systems

Authors:
A. Martí Campoy;E. Tamura;S. Sáez;F. Rodríguez;J. V. Busquets-Mataix
Affiliations:
Departamento de Informática de Sistemas y Computadores, Universidad Politécnica de Valencia, Valencia, Spain;Grupo de Automática y Robótica, Pontificia Universidad Javeriana, Cali, Colombia;Departamento de Informática de Sistemas y Computadores, Universidad Politécnica de Valencia, Valencia, Spain;Departamento de Informática de Sistemas y Computadores, Universidad Politécnica de Valencia, Valencia, Spain;Departamento de Informática de Sistemas y Computadores, Universidad Politécnica de Valencia, Valencia, Spain
Venue:
ICESS'05 Proceedings of the Second international conference on Embedded Software and Systems
Year:
2005

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Abstract

Cache memories are crucial to obtain high performance on contemporary processors. However, they have been traditionally avoided in embedded real-time systems due to their lack of determinism. Unfortunately, most of the techniques to attain predictability on caches are complex to apply, precluding their use on real applications. This work reviews several techniques developed by the authors to use cache memories in “real” embedded real-time systems, with the ease of use in mind. Those techniques are based on a locking cache, which offers a very predictable behaviour. Both static and dynamic use are proposed as well as the algorithms and methods required to make the schedulability analysis using two different scheduling policies. Also proposed is a genetic algorithm that finds, within acceptable computational cost, the sub-optimal set of instructions that must be preloaded in cache. Finally, a set of statistical analyses compares the locking cache versus a conventional one.