Jaguar: a compiler infrastructure for java reconfigurable computing

Authors:
Youngsun Han;Seon Wook Kim;Chulwoo Kim
Affiliations:
Department of Electronics and Computer Engineering, Korea University, Seoul, Korea;Department of Electronics and Computer Engineering, Korea University, Seoul, Korea;Department of Electronics and Computer Engineering, Korea University, Seoul, Korea
Venue:
ICESS'05 Proceedings of the Second international conference on Embedded Software and Systems
Year:
2005

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Abstract

In this paper, we present our compiler infrastructure, called Jaguar for Java reconfigurable computing. The Jaguar compiler translates compiled Java methods, i.e. sequence of bytecodes into Verilog synthesizable code modules with exploiting the maximum operational parallelism within applications. Our compiler infrastructure consists of two major components. One is a compiler to generate synthesizable Verilog codes from Java applications, which performs full compilation passes, such as bytecode parsing, intermediate representation (IR) construction, program analysis, optimization, and code emission. The other component is the Java Virtual Machine (JVM) which provides Java execution environment to the generated Verilog modules. The JVM closely interacts with hardware during the execution through an interrupt method. We discuss the performance issues and code transformation techniques to reduce the interaction overhead in our Java reconfigurable computing environment.