Packet classification with evolvable hardware hash functions – an intrinsic approach

Authors:
Harald Widiger;Ralf Salomon;Dirk Timmermann
Affiliations:
Institute of Applied Microelectronics and Computer Engineering, University of Rostock, Rostock-Warnemuende, Germany;Institute of Applied Microelectronics and Computer Engineering, University of Rostock, Rostock-Warnemuende, Germany;Institute of Applied Microelectronics and Computer Engineering, University of Rostock, Rostock-Warnemuende, Germany
Venue:
BioADIT'06 Proceedings of the Second international conference on Biologically Inspired Approaches to Advanced Information Technology
Year:
2006

Citing 7
Cited 0

Genetic Algorithms in Search, Optimization and Machine Learning

Genetic Algorithms in Search, Optimization and Machine Learning
Classifying Packets with Hierarchical Intelligent Cuttings

IEEE Micro
On-Line Evolution of FPGA-Based Circuits: A Case Study on Hash Functions

EH '99 Proceedings of the 1st NASA/DOD workshop on Evolvable Hardware
Prototyping a GA Pipeline for Complete Hardware Evolution

EH '99 Proceedings of the 1st NASA/DOD workshop on Evolvable Hardware
Design Flow on a Chip - An Evolvable HW/SW Platform

ICAC '05 Proceedings of the Second International Conference on Automatic Computing
Promises and challenges of evolvable hardware

IEEE Transactions on Systems, Man, and Cybernetics, Part C: Applications and Reviews
Algorithms for packet classification

IEEE Network: The Magazine of Global Internetworking

Quantified Score

Hi-index	0.00

Visualization

Abstract

Bandwidth demands of communication networks are rising permanently. Thus, the requirements to modern routers regarding packet classification are rising accordingly. Conventional algorithms for packet classification use either a huge amount of memory or have high computational demands to perform the task. Using a hash function in order to classify packets is promising regarding both memory and computation time. However, such a hash function needs to be of high performance and cheap in hardware costs. These two design goals are contradictory. To limit the costs of a hardware implementation, known good hash functions, as used for software implementations of encryption algorithms, are applicable to only a limited extend. To achieve the goals mentioned above, an adaptive hash function is needed. In this paper, an approach for a hardware packet classifier using an evolvable hash function is presented. It consists of an evolutionary algorithm which is entirely implemented in hardware.