A performance model of fault-tolerant routing algorithm in interconnect networks

  • Authors:
  • F. Safaei;M. Fathy;A. Khonsari;M. Ould-Khaoua

  • Affiliations:
  • IPM School of Computer Science, Tehran, Iran;Dept. of Computer Eng., Iran Univ. of Science and Technology, Tehran, Iran;IPM School of Computer Science, Tehran, Iran;Dept. of Computing Science, Univ. of Glasgow, UK

  • Venue:
  • ICCS'06 Proceedings of the 6th international conference on Computational Science - Volume Part I
  • Year:
  • 2006

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Abstract

The Software-Based fault-tolerant routing [1] has been proposed as an efficient routing algorithm to preserve both performance and fault-tolerant demands in large–scale parallel computers and current multiprocessor systems-on-chip (Mp-SoCs). A number of different analytical models for fault-free routing algorithms have been suggested in the past literature. However, there has not been reported any similar analytical model of fault-tolerant routing in the presence of faulty components. This paper presents a new analytical model to capture the effects of failures in wormhole-switched k-ary n-cubes using Software-Based fault-tolerant routing algorithm. The validity of the model is demonstrated by comparing analytical results with those obtained through simulation experiments.