High-speed digital design: a handbook of black magic
High-speed digital design: a handbook of black magic
An Approximate Minimum Degree Ordering Algorithm
SIAM Journal on Matrix Analysis and Applications
Power supply noise analysis methodology for deep-submicron VLSI chip design
DAC '97 Proceedings of the 34th annual Design Automation Conference
Efficient large-scale power grid analysis based on preconditioned krylov-subspace iterative methods
Proceedings of the 38th annual Design Automation Conference
Computer Solution of Large Sparse Positive Definite
Computer Solution of Large Sparse Positive Definite
Random walks in a supply network
Proceedings of the 40th annual Design Automation Conference
Iterative Methods for Sparse Linear Systems
Iterative Methods for Sparse Linear Systems
A multigrid-like technique for power grid analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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As the number of metal layers and the frequency of VLSI continue to increase, the voltage droop on both the package and vias is becoming more pronounced. This paper analyzes the numerical problem encountered in simulation of power/ground networks together with C4 package and via model. A new preconditioned iterative method and associated acceleration technique are introduced to overcome shortages of previous methods. The new method not only is effective to speedup simulation without loosing any accuracy, but also extends the usage of preconditioned method to general circuit simulation using only a few additional memories due to its MNA formulation.