An analysis of power reduction in datacenters using heterogeneous chip multiprocessors

  • Authors:
  • Vishal Gupta;Ripal Nathuji;Karsten Schwan

  • Affiliations:
  • Georgia Tech, Atlanta, GA;Microsoft Research, Redmond, WA;Georgia Tech, Atlanta, GA

  • Venue:
  • ACM SIGMETRICS Performance Evaluation Review
  • Year:
  • 2011

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Abstract

Power and design constraints have forced the semiconductor industry to look at alternate solutions like heterogeneous chip multiprocessors to continue application performance scaling and improve energy efficiency of multicore processors. In this paper, we present an opportunity analysis of heterogeneous chip multiprocessors in the context of datacenter environments where applications often have latency SLAs. Specifically, we define three use cases of heterogeneous processors for datacenter applications and adopt an analytical approach to quantify relative energy savings of using heterogeneous processors over area-equivalent homogeneous configurations. Based upon our findings, we discuss the practical merits of heterogeneous chip multiprocessors in datacenters, including the issues that must be addressed in order to realize the theoretical benefits.