The complexity of propositional linear temporal logics
Journal of the ACM (JACM)
The temporal logic of reactive and concurrent systems
The temporal logic of reactive and concurrent systems
Symbolic model checking: 1020 states and beyond
Information and Computation - Special issue: Selections from 1990 IEEE symposium on logic in computer science
Memory-efficient algorithms for the verification of temporal properties
Formal Methods in System Design - Special issue on computer-aided verification: general methods
Reasoning about infinite computations
Information and Computation
Forward model checking techniques oriented to buggy designs
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Bounded Model Checking Using Satisfiability Solving
Formal Methods in System Design
Model Checking of Safety Properties
Formal Methods in System Design
LPAR '01 Proceedings of the Artificial Intelligence on Logic for Programming
Simple on-the-fly automatic verification of linear temporal logic
Proceedings of the Fifteenth IFIP WG6.1 International Symposium on Protocol Specification, Testing and Verification XV
Deterministic w Automata vis-a-vis Deterministic Buchi Automata
ISAAC '94 Proceedings of the 5th International Symposium on Algorithms and Computation
Using Unfoldings to Avoid the State Explosion Problem in the Verification of Asynchronous Circuits
CAV '92 Proceedings of the Fourth International Workshop on Computer Aided Verification
On-the-Fly Verification with Stubborn Sets
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
Deadlock Checking Using Net Unfoldings
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
Using Partial Orders for the Efficient Verification of Deadlock Freedom and Safety Properties
CAV '91 Proceedings of the 3rd International Workshop on Computer Aided Verification
Relating word and tree automata
LICS '96 Proceedings of the 11th Annual IEEE Symposium on Logic in Computer Science
Nondeterminism and the size of two way finite automata
STOC '78 Proceedings of the tenth annual ACM symposium on Theory of computing
Automata-Based Verification of Temporal Properties on Running Programs
Proceedings of the 16th IEEE international conference on Automated software engineering
STeP: The Stanford Temporal Prover
STeP: The Stanford Temporal Prover
From linear time to branching time
ACM Transactions on Computational Logic (TOCL)
FOCS '05 Proceedings of the 46th Annual IEEE Symposium on Foundations of Computer Science
Spin model checker, the: primer and reference manual
Spin model checker, the: primer and reference manual
Economy of description by automata, grammars, and formal systems
SWAT '71 Proceedings of the 12th Annual Symposium on Switching and Automata Theory (swat 1971)
Efficient model checking of safety properties
SPIN'03 Proceedings of the 10th international conference on Model checking software
Deterministic dynamic monitors for linear-time assertions
FATES'06/RV'06 Proceedings of the First combined international conference on Formal Approaches to Software Testing and Runtime Verification
Specification Mining with Few False Positives
TACAS '09 Proceedings of the 15th International Conference on Tools and Algorithms for the Construction and Analysis of Systems: Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2009,
Better under-approximation of programs by hiding variables
VMCAI'07 Proceedings of the 8th international conference on Verification, model checking, and abstract interpretation
Optimized temporal monitors for SystemC
RV'10 Proceedings of the First international conference on Runtime verification
Tightening the exchange rates between automata
CSL'07/EACSL'07 Proceedings of the 21st international conference, and Proceedings of the 16th annuall conference on Computer Science Logic
Optimized temporal monitors for SystemC
Formal Methods in System Design
Deterministic compilation of temporal safety properties in explicit state model checking
HVC'12 Proceedings of the 8th international conference on Hardware and Software: verification and testing
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Of special interest in formal verification are safety properties, which assert that the system always stays within some allowed region. Each safety property ψ can be associated with a set of bad prefixes: a set of finite computations such that an infinite computation violates ψ iff it has a prefix in the set. By translating a safety property to an automaton for its set of bad prefixes, verification can be reduced to reasoning about finite words: a system is correct if none of its computations has a bad prefix. Checking the latter circumvents the need to reason about cycles and simplifies significantly methods like symbolic fixed-point based verification, bounded model checking, and more. A drawback of the translation lies in the size of the automata: while the translation of a safety LTL formula ψ to a nondeterministic Büchi automaton is exponential, its translation to a tight bad-prefix automaton — one that accepts all the bad prefixes of ψ, is doubly exponential. Kupferman and Vardi showed that for the purpose of verification, one can replace the tight automaton by a fine automaton — one that accepts at least one bad prefix of each infinite computation that violates ψ. They also showed that for many safety LTL formulas, a fine automaton has the same structure as the Büchi automaton for the formula. The problem of constructing fine automata for general safety LTL formulas was left open. In this paper we solve this problem and show that while a fine automaton cannot, in general, have the same structure as the Büchi automaton for the formula, the size of a fine automaton is still only exponential in the length of the formula.