CRYPTO '99 Proceedings of the 19th Annual International Cryptology Conference on Advances in Cryptology
A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Delay Insensitive Encoding and Power Analysis: A Balancing Act
ASYNC '05 Proceedings of the 11th IEEE International Symposium on Asynchronous Circuits and Systems
A VLSI Design Flow for Secure Side-Channel Attack Resistant ICs
Proceedings of the conference on Design, Automation and Test in Europe - Volume 3
A side-channel analysis resistant description of the AES s-box
FSE'05 Proceedings of the 12th international conference on Fast Software Encryption
Side-channel leakage of masked CMOS gates
CT-RSA'05 Proceedings of the 2005 international conference on Topics in Cryptology
Shape analysis for power signal cryptanalysis on secure components
Journal of Systems and Software
Utilizing random noise in cryptography: where is the tofu?
Proceedings of the International Conference on Computer-Aided Design
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Security is a concern in the design of smartcards. It is possible to leak much side channel information related to secret key when cryptographic algorithm runs on smartcards. Power analysis attacks are a very strong cryptanalysis by monitoring and analyzing power consumption traces. In this paper, we experiment Exclusive OR operation. We also analyze the tendency of state-of-the-art regarding hardware countermeasures and experiments of Hamming-Weights on power attacks. It can be useful to evaluate a cryptosystem related with hardware security technology.