A fast algorithm for computing multiplicative inverses in GF(2m) using normal bases
Information and Computation
An ASIC Implementation of the AES SBoxes
CT-RSA '02 Proceedings of the The Cryptographer's Track at the RSA Conference on Topics in Cryptology
Towards Sound Approaches to Counteract Power-Analysis Attacks
CRYPTO '99 Proceedings of the 19th Annual International Cryptology Conference on Advances in Cryptology
CRYPTO '99 Proceedings of the 19th Annual International Cryptology Conference on Advances in Cryptology
A Compact Rijndael Hardware Architecture with S-Box Optimization
ASIACRYPT '01 Proceedings of the 7th International Conference on the Theory and Application of Cryptology and Information Security: Advances in Cryptology
An Implementation of DES and AES, Secure against Some Attacks
CHES '01 Proceedings of the Third International Workshop on Cryptographic Hardware and Embedded Systems
Multiplicative Masking and Power Analysis of AES
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
Simplified Adaptive Multiplicative Masking for AES
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
Protecting AES Software Implementations on 32-Bit Processors Against Power Analysis
ACNS '07 Proceedings of the 5th international conference on Applied Cryptography and Network Security
DPA-Resistance Without Routing Constraints?
CHES '07 Proceedings of the 9th international workshop on Cryptographic Hardware and Embedded Systems
Collision Attacks on AES-Based MAC: Alpha-MAC
CHES '07 Proceedings of the 9th international workshop on Cryptographic Hardware and Embedded Systems
Two New Techniques of Side-Channel Cryptanalysis
CHES '07 Proceedings of the 9th international workshop on Cryptographic Hardware and Embedded Systems
Attack and Improvement of a Secure S-Box Calculation Based on the Fourier Transform
CHES '08 Proceeding sof the 10th international workshop on Cryptographic Hardware and Embedded Systems
A New DPA Countermeasure Based on Permutation Tables
SCN '08 Proceedings of the 6th international conference on Security and Cryptography for Networks
Dual-rail transition logic: A logic style for counteracting power analysis attacks
Computers and Electrical Engineering
Secure Hardware Implementation of Non-linear Functions in the Presence of Glitches
Information Security and Cryptology --- ICISC 2008
Side-Channel Leakage in Masked Circuits Caused by Higher-Order Circuit Effects
ISA '09 Proceedings of the 3rd International Conference and Workshops on Advances in Information Security and Assurance
Vulnerability modeling of cryptographic hardware to power analysis attacks
Integration, the VLSI Journal
On Physical Obfuscation of Cryptographic Algorithms
INDOCRYPT '09 Proceedings of the 10th International Conference on Cryptology in India: Progress in Cryptology
Investigations of power analysis attacks and countermeasures for ARIA
WISA'06 Proceedings of the 7th international conference on Information security applications: PartI
Power analysis attacks on MDPL and DRSL implementations
ICISC'07 Proceedings of the 10th international conference on Information security and cryptology
First-order differential power analysis on the duplication method
INDOCRYPT'07 Proceedings of the cryptology 8th international conference on Progress in cryptology
Design of a differential power analysis resistant masked AES S-box
INDOCRYPT'07 Proceedings of the cryptology 8th international conference on Progress in cryptology
ICISS'07 Proceedings of the 3rd international conference on Information systems security
Improved side-channel collision attacks on AES
SAC'07 Proceedings of the 14th international conference on Selected areas in cryptography
A generic method for secure Sbox implementation
WISA'07 Proceedings of the 8th international conference on Information security applications
Compact and secure design of masked AES S-box
ICICS'07 Proceedings of the 9th international conference on Information and communications security
A very compact "Perfectly masked" S-box for AES
ACNS'08 Proceedings of the 6th international conference on Applied cryptography and network security
A new remote keyless entry system resistant to power analysis attacks
ICICS'09 Proceedings of the 7th international conference on Information, communications and signal processing
A low overhead DPA countermeasure circuit based on ring oscillators
IEEE Transactions on Circuits and Systems II: Express Briefs
Correlation-enhanced power analysis collision attack
CHES'10 Proceedings of the 12th international conference on Cryptographic hardware and embedded systems
Provably secure higher-order masking of AES
CHES'10 Proceedings of the 12th international conference on Cryptographic hardware and embedded systems
Secure multiplicative masking of power functions
ACNS'10 Proceedings of the 8th international conference on Applied cryptography and network security
Lightweight cryptography and DPA countermeasures: a survey
FC'10 Proceedings of the 14th international conference on Financial cryptograpy and data security
On side-channel resistant block cipher usage
ISC'10 Proceedings of the 13th international conference on Information security
Pushing the limits: a very compact and a threshold implementation of AES
EUROCRYPT'11 Proceedings of the 30th Annual international conference on Theory and applications of cryptographic techniques: advances in cryptology
Montgomery's trick and fast implementation of masked AES
AFRICACRYPT'11 Proceedings of the 4th international conference on Progress in cryptology in Africa
Improved collision-correlation power analysis on first order protected AES
CHES'11 Proceedings of the 13th international conference on Cryptographic hardware and embedded systems
A fast and provably secure higher-order masking of AES S-box
CHES'11 Proceedings of the 13th international conference on Cryptographic hardware and embedded systems
Thwarting higher-order side channel analysis with additive and multiplicative maskings
CHES'11 Proceedings of the 13th international conference on Cryptographic hardware and embedded systems
An architecture-independent instruction shuffler to protect against side-channel attacks
ACM Transactions on Architecture and Code Optimization (TACO) - HIPEAC Papers
Threshold implementations against side-channel attacks and glitches
ICICS'06 Proceedings of the 8th international conference on Information and Communications Security
Accelerating AES using instruction set extensions for elliptic curve cryptography
ICCSA'05 Proceedings of the 2005 international conference on Computational Science and Its Applications - Volume Part II
Pinpointing the side-channel leakage of masked AES hardware implementations
CHES'06 Proceedings of the 8th international conference on Cryptographic Hardware and Embedded Systems
Provably secure s-box implementation based on fourier transform
CHES'06 Proceedings of the 8th international conference on Cryptographic Hardware and Embedded Systems
Dual-rail random switching logic: a countermeasure to reduce side channel leakage
CHES'06 Proceedings of the 8th international conference on Cryptographic Hardware and Embedded Systems
Cache attacks and countermeasures: the case of AES
CT-RSA'06 Proceedings of the 2006 The Cryptographers' Track at the RSA conference on Topics in Cryptology
DPA-resistant finite field multipliers and secure AES design
ISPEC'06 Proceedings of the Second international conference on Information Security Practice and Experience
Successfully attacking masked AES hardware implementations
CHES'05 Proceedings of the 7th international conference on Cryptographic hardware and embedded systems
Improved higher-order side-channel attacks with FPGA experiments
CHES'05 Proceedings of the 7th international conference on Cryptographic hardware and embedded systems
Experiments and hardware countermeasures on power analysis attacks
ICCSA'06 Proceedings of the 2006 international conference on Computational Science and Its Applications - Volume Part III
An AES smart card implementation resistant to power analysis attacks
ACNS'06 Proceedings of the 4th international conference on Applied Cryptography and Network Security
An efficient masking scheme for AES software implementations
WISA'05 Proceedings of the 6th international conference on Information Security Applications
An algebraic masking method to protect AES against power attacks
ICISC'05 Proceedings of the 8th international conference on Information Security and Cryptology
Masking with randomized look up tables
Cryptography and Security
Combined fault and side-channel attack on protected implementations of AES
CARDIS'11 Proceedings of the 10th IFIP WG 8.8/11.2 international conference on Smart Card Research and Advanced Applications
PKDPA: an enhanced probabilistic differential power attack methodology
INDOCRYPT'11 Proceedings of the 12th international conference on Cryptology in India
PICARO: a block cipher allowing efficient higher-order side-channel resistance
ACNS'12 Proceedings of the 10th international conference on Applied Cryptography and Network Security
Randomized execution algorithms for smart cards to resist power analysis attacks
Journal of Systems Architecture: the EUROMICRO Journal
CHES'12 Proceedings of the 14th international conference on Cryptographic Hardware and Embedded Systems
Threshold implementations of all 3×3 and 4×4 s-boxes
CHES'12 Proceedings of the 14th international conference on Cryptographic Hardware and Embedded Systems
A novel circuit design methodology to reduce side channel leakage
SPACE'12 Proceedings of the Second international conference on Security, Privacy, and Applied Cryptography Engineering
On the use of shamir's secret sharing against side-channel analysis
CARDIS'12 Proceedings of the 11th international conference on Smart Card Research and Advanced Applications
Chosen-IV correlation power analysis on KCipher-2 and a countermeasure
COSADE'13 Proceedings of the 4th international conference on Constructive Side-Channel Analysis and Secure Design
CHES'13 Proceedings of the 15th international conference on Cryptographic Hardware and Embedded Systems
Block ciphers that are easier to mask: how far can we go?
CHES'13 Proceedings of the 15th international conference on Cryptographic Hardware and Embedded Systems
AES side-channel countermeasure using random tower field constructions
Designs, Codes and Cryptography
Impact of dual placement and routing on WDDL netlist security in FPGA
International Journal of Reconfigurable Computing
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So far, efficient algorithmic countermeasures to secure the AES algorithm against (first-order) differential side-channel attacks have been very expensive to implement. In this article, we introduce a new masking countermeasure which is not only secure against first-order side-channel attacks, but which also leads to relatively small implementations compared to other masking schemes implemented in dedicated hardware. Our approach is based on shifting the computation of the finite field inversion in the AES S-box down to GF(4). In this field, the inversion is a linear operation and therefore it is easy to mask. Summarizing, the new masking scheme combines the concepts of multiplicative and additive masking in such a way that security against first-order side-channel attacks is maintained, and that small implementations in dedicated hardware can be achieved.