A new algorithm for floorplan design
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
An enhanced perturbing algorithm for floorplan design using the O-tree representation
ISPD '00 Proceedings of the 2000 international symposium on Physical design
B*-Trees: a new representation for non-slicing floorplans
Proceedings of the 37th Annual Design Automation Conference
Multidimensional binary search trees used for associative searching
Communications of the ACM
A Near-Optimal Solution to a Two-Dimensional Cutting Stock Problem
Mathematics of Operations Research
ECBL: an extended corner block list with solution space including optimum placement
Proceedings of the 2001 international symposium on Physical design
FAST-SP: a fast algorithm for block placement based on sequence pair
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
TCG: a transitive closure graph-based representation for non-slicing floorplans
Proceedings of the 38th annual Design Automation Conference
TCG-S: orthogonal coupling of P*-admissible representations for general floorplans
Proceedings of the 39th annual Design Automation Conference
An Enhanced Q-Sequence Augmented with Empty-Room-Insertion and Parenthesis Trees
Proceedings of the conference on Design, automation and test in Europe
FOCS '96 Proceedings of the 37th Annual Symposium on Foundations of Computer Science
Practical slicing and non-slicing block-packing without simulated annealing
Proceedings of the 14th ACM Great Lakes symposium on VLSI
ACG-Adjacent Constraint Graph for General Floorplans
ICCD '04 Proceedings of the IEEE International Conference on Computer Design
The Bottomn-Left Bin-Packing Heuristic: An Efficient Implementation
IEEE Transactions on Computers
VLSI/PCB placement with obstacles based on sequence pair
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Twin binary sequences: a nonredundant representation for general nonslicing floorplan
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A two-level search algorithm for 2D rectangular packing problem
Computers and Industrial Engineering
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Two dimensional cutting and packing problems have applications in many manufacturing and job allocation problems. In particular, in VLSI floor planning problems and stock cutting problems, many simulated annealing and genetic algorithms based methods have been proposed in the last ten years. These researches have mainly been focused on finding efficient data structures for representing packing results so the search space and processing time of the underlying search engine can be minimized. In this paper, we tackle the problem from a different approach. Instead of using stochastic searches, we introduce an effective deterministic optimization algorithm for packing and cutting. By combining an improved Least Flexibility First principle and a greedy search based evaluation routine, we can obtain very encouraging results: In stock cutting problems, our algorithm achieved over 99% average packing density for a series of public rectangle packing data sets, which is significantly better than the 96% packing density obtained by meta-heuristics (simulated annealing) based results while using much less CPU time; whereas in rectangle packing applying the well-known MCNC and GSRC benchmarks, we achieved the best (over 96%) packing density among all known published results packed by other methods. Our encouraging results seem to suggesting a new experimental direction in designing efficient deterministic heuristics for some kind of hard combinatorial problems.