Exploring technology alternatives for nano-scale FPGA interconnects
Proceedings of the 42nd annual Design Automation Conference
Nanocomputing in the presence of defects and faults: a survey
Nano, quantum and molecular computing
Assessing carbon nanotube bundle interconnect for future FPGA architectures
Proceedings of the conference on Design, automation and test in Europe
Computing with random quantum dot repulsion
Information Sciences: an International Journal
Topology-unaware routing in irregular self-assembled networks-on-chip: an explorative case study
Proceedings of the 2nd international conference on Nano-Networks
A study of asynchronous design methodology for robust CMOS-nano hybrid system design
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Wire cost and communication analysis of self-assembled interconnect models for Networks-on-Chip
Proceedings of the 2nd International Workshop on Network on Chip Architectures
Challenges and promises of nano and bio communication networks
NOCS '11 Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip
Nanoscale electronic synapses using phase change devices
ACM Journal on Emerging Technologies in Computing Systems (JETC) - Special issue on memory technologies
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Molecular electronics seeks to build electrical devices to implement computation - logic and memory - using individual or small collections of molecules. These devices have the potential to reduce device size and fabrication costs, by several orders of magnitude, relative to conventional CMOS. However, the construction of a practical molecular computer will require the molecular switches and their related interconnect technologies to behave as large-scale diverse logic, with input/output wires scaled to molecular dimensions. It is unclear whether it is necessary or even. possible to control the precise regular placement and interconnection of these diminutive molecular systems. This paper describes genetic algorithm-based simulations of molecular device structures in a nanocell where placement and connectivity of the internal molecular switches are not specifically directed and the internal topology is generally disordered. With some simplifying assumptions, these results show that it is possible to use easily fabricated nanocells as logic devices by setting the internal molecular switch states after the topological molecular assembly is complete. Simulated logic devices include an inverter, a NAND gate, an XOR gate and a 1-bit adder. Issues of defect and fault tolerance are addressed.