Communications of the ACM
Digital integrated circuits: a design perspective
Digital integrated circuits: a design perspective
Multilevel hypergraph partitioning: applications in VLSI domain
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
NanoFabrics: spatial computing using molecular electronics
ISCA '01 Proceedings of the 28th annual international symposium on Computer architecture
Self-Timed Logic Using Current-Sensing Completion Detection (CSCD)
ICCD '91 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
On the Defect Tolerance of Nano-Scale Two-Dimensional Crossbars
DFT '04 Proceedings of the Defect and Fault Tolerance in VLSI Systems, 19th IEEE International Symposium
Scalable defect mapping and configuration of memory-based nanofabrics
HLDVT '05 Proceedings of the High-Level Design Validation and Test Workshop, 2005. on Tenth IEEE International
Defect-tolerant Logic with Nanoscale Crossbar Circuits
Journal of Electronic Testing: Theory and Applications
Analysis and Robust Design of Diode-Resistor Based Nanoscale Crossbar PLA Circuits
VLSID '08 Proceedings of the 21st International Conference on VLSI Design
Principles of Asynchronous Circuit Design: A Systems Perspective
Principles of Asynchronous Circuit Design: A Systems Perspective
Nanocell logic gates for molecular computing
IEEE Transactions on Nanotechnology
Array-based architecture for FET-based, nanoscale electronics
IEEE Transactions on Nanotechnology
CMOS/nano co-design for crossbar-based molecular electronic systems
IEEE Transactions on Nanotechnology
Variation-immune quasi delay-insensitive implementation on nano-crossbar arrays
Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
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Among the emerging alternatives to CMOS, molecular electronics based diode-resistor crossbar fabric has generated considerable interest in recent times. Logic circuit design with future nano-scale molecular devices using dense and regular crossbar fabrics is promising in terms of integration density, performance and power dissipation. However, circuit design using molecular switches involve some major challenges: 1) lack of voltage gain of these switches that prevents logic cascading; 2) large output voltage level degradation; 3) vulnerability to parameter variations that affect yield and robustness of operation; and 4) high defect rate. In this article, we analyze some of the above challenges and investigate the effectiveness of asynchronous design methodology in a hybrid system design platform using molecular crossbar and CMOS interfacing elements. We explore different approaches of asynchronous circuit design and compare their suitability in terms of several circuit design parameters. We then develop the methodology and an automated synthesis flow to support two different asynchronous design approaches (Micropipelines and Four phase Dual-rail) for system designs using nano-crossbar logic stages and CMOS interface data-storage elements. Circuit-level simulation results for several benchmarks show considerable advantage in terms of performance and robustness at moderate area and power overhead compared to two different synchronous implementations.