Digital VLSI logic technology using Carbon Nanotube FETs: frequently asked questions
Proceedings of the 46th Annual Design Automation Conference
Design methodology for Carbon Nanotube based circuits in the presence of metallic tubes
Proceedings of the 2010 IEEE/ACM International Symposium on Nanoscale Architectures
Carbon nanotube correlation: promising opportunity for CNFET circuit yield enhancement
Proceedings of the 47th Design Automation Conference
Carbon nanotube circuits: living with imperfections and variations
Proceedings of the Conference on Design, Automation and Test in Europe
Carbon nanotube circuits: opportunities and challenges
Proceedings of the Conference on Design, Automation and Test in Europe
Rapid exploration of processing and design guidelines to overcome carbon nanotube variations
Proceedings of the 50th Annual Design Automation Conference
On the Delay of a CNTFET with Undeposited CNTs by Gate Width Adjustment
Journal of Electronic Testing: Theory and Applications
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Experimental demonstration of wafer-scale growth of well-aligned, dense, single-walled carbon nanotubes on 4" ST-cut quartz wafers is presented. We developed a new carbon nanotube (CNT) wafer-scale growth process. This process allows quartz wafers to be heated to the CNT growth temperature of 865degC through the alpha-beta phase transformation temperature of quartz (573degC) without wafer fracture. We also demonstrate wafer-scale CNT transfer to transfer these aligned CNTs from quartz wafers to silicon wafers. The CNT transfer process preserves CNT density and alignment. Carbon nanotube FETs fabricated using these transferred CNTs exhibit high yield. Wafer-scale growth and wafer-scale transfer of aligned CNTs enable carbon nanotube very large-scale integration circuits and their large-scale integration with silicon CMOS.