Report on the programming language Haskell: a non-strict, purely functional language version 1.2
ACM SIGPLAN Notices - Haskell special issue
C: a language for high-level, efficient, and machine-independent dynamic code generation
POPL '96 Proceedings of the 23rd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
A general approach for run-time specialization and its application to C
POPL '96 Proceedings of the 23rd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Formal Semantics for VHDL
Design methodologies for partially reconfigured systems
FCCM '95 Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines
Run time reconfiguration of FPGA for scanning genomic databases
FCCM '95 Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines
A dynamic instruction set computer
FCCM '95 Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines
Architectural descriptions for FPGA circuits
FCCM '95 Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines
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Many algorithms have a very efficient hardware implementation that cannot be captured by a general-purpose processor. The static nature of hardware implementations has previously made them unsuitable in a flexible computer. However, modern dynamically-reprogrammable hardware provides the ability to realise new algorithms in hardware at run-time. However, these devices are typically more limited in terms of speed and computing resource than static hardware. In order to reclaim some of the cost of using reprogrammable hardware, we must look to new design methods for optimising implementations for dynamic hardware. By drawing on ideas from software design, this paper demonstrates how the technique of partial evaluation can be used to systematically, and formally, derive efficient specialisations of hardware implementations optimised for dynamic hardware, and further, how one might feasibly perform such specialisation at run-time with minimal cost.