Statistical delay computation considering spatial correlations
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Proceedings of the 47th Design Automation Conference
Active learning framework for post-silicon variation extraction and test cost reduction
Proceedings of the International Conference on Computer-Aided Design
Robust Extraction of Spatial Correlation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Hi-index | 0.00 |
Active-matrix organic light emitting diode displays are prone to significant Vth and mobility variations in low-temperature polycrystalline-silicon thin-film transistors. A low-cost characterization of these variations can lead to a practical external calibration and simulation of the display non-uniformity. This paper proposes a generic methodology based on principal component analysis, relying on the display current levels corresponding to applied characterization images. This technique results in simultaneous characterization of the Vth and mobility for the entire active matrix. Measurement results show that taking advantage of spatial correlation leads to 100 times reduction in characterization time with less than 30% relative error.