On a Pin Versus Block Relationship For Partitions of Logic Graphs
IEEE Transactions on Computers
Detailed-routing algorithms for dense pin clusters in integrated circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
What makes a design difficult to route
Proceedings of the 19th international symposium on Physical design
Layout generator for transistor-level high-density regular circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
RegularRoute: an efficient detailed router with regular routing patterns
Proceedings of the 2011 international symposium on Physical design
Comparative evaluation of layout density in 3T, 4T, and MT FinFET standard cells
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
New placement prediction and mitigation techniques for local routing congestion
Proceedings of the International Conference on Computer-Aided Design
Generating synthetic benchmark circuits for evaluating CAD tools
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Estimating routing congestion using probabilistic analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
MaizeRouter: Engineering an Effective Global Router
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
On Cell Layout-Performance Relationships in VeSFET-Based, High-Density Regular Circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Designing VeSFET-based ICs with CMOS-oriented EDA infrastructure
Proceedings of the 2013 ACM international symposium on International symposium on physical design
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If pin density exceeds a certain threshold, pin access becomes a challenge for inter-cell signal routing and increasing the number of metal layers cannot improve routability. CMOS and FinFET layouts may never reach this threshold, but Vertical Slit Field Effect Transistor (VeSFET) ICs may exceed it. We demonstrate that VeSFET layouts are still routable within footprint using two-sided routing which achieves better wire length and via usage than one-sided routing with or without white space inserted.