An Area-Efficient FFT Architecture for OFDM Digital Video Broadcasting

Authors:
R. M. Jiang
Affiliations:
Peking Univ., Beijing
Venue:
IEEE Transactions on Consumer Electronics
Year:
2007

Citing 0
Cited 4

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Abstract

In this paper, a novel high-performance 8k-point fast Fourier transform (DFT) processor architecture for OFDM digital video broadcasting(DVB) is proposed based on a novel radix-8 FFT architecture. Distributed arithmetic (DA) is used to implement the basic 8-point FFTs directly, where the hardware cost of complex multipliers and adders can be greatly reduced. The twiddle multiplications are performed by CORDIC-based twiddle multipliers. The results show that the proposed processor architecture can greatly save the area cost while keeping a high-speed processing speed, which may be attractive for many real-time DVB-T systems.