Cordic based parallel/pipelined architecture for the Hough transform
Journal of VLSI Signal Processing Systems
Parallel Compensation of Scale Factor for the CORDIC Algorithm
Journal of VLSI Signal Processing Systems
A VLSI Constant Geometry Architecture for the Fast Hartley and Fourier Transforms
IEEE Transactions on Parallel and Distributed Systems
CORDIC Architectures with Parallel Compensation of the Scale Factor
ASAP '95 Proceedings of the IEEE International Conference on Application Specific Array Processors
High-Throughput CORDIC-Based Geometry Operations for 3D Computer Graphics
IEEE Transactions on Computers
A Scale Factor Correction Scheme for the CORDIC Algorithm
IEEE Transactions on Computers
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Efficient CORDIC algorithms and architectures for low area and high throughput implementation
IEEE Transactions on Circuits and Systems II: Express Briefs
A CORDIC-based unified systolic architecture for sliding windowapplications of discrete transforms
IEEE Transactions on Signal Processing
CORDIC-based architecture with channel state information for OFDM baseband receiver
IEEE Transactions on Consumer Electronics
Implementation of synchronization for 2x2 MIMO WLAN system
IEEE Transactions on Consumer Electronics
An Area-Efficient FFT Architecture for OFDM Digital Video Broadcasting
IEEE Transactions on Consumer Electronics
The use of CORDIC in software defined radios: a tutorial
IEEE Communications Magazine
FPGA Implementation of an Iterative Receiver for MIMO-OFDM Systems
IEEE Journal on Selected Areas in Communications
Modified virtually scaling-free adaptive CORDIC rotator algorithm and architecture
IEEE Transactions on Circuits and Systems for Video Technology
International Journal of Reconfigurable Computing
Area-time efficient scaling-free CORDIC using generalized micro-rotation selection
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Coordinate Rotation DIgital Computer (CORDIC) rotator is a well known and widely used algorithm within computers due to its way of carrying out some calculations such as trigonometric functions, among others. A scale factor compensation inherent to the CORDIC algorithm becomes an important drawback when trying to improve its benefits, although some authors have come up with a new scaling-free version, which has been successfully implemented within wireless applications. However, this new CORDIC can still be significantly improved by modifying some of its parts, therefore, this paper shows an enhanced version of the scaling-free CORDIC. These new enhancements have been implemented and tested, obtaining some new architectures which are able to reach a 35% lower latency and a 36% reduction in area and power consumption compared to the original scaling-free architecture.