On-the-fly conversion of redundant into conventional representations
IEEE Transactions on Computers
Computer arithmetic algorithms
Computer arithmetic algorithms
IEEE Transactions on Computers
A new addition scheme and fast scaling factor compensation methods for CORDIC algorithms
Integration, the VLSI Journal
Constant-Factor Redundant CORDIC for Angle Calculation and Rotation
IEEE Transactions on Computers - Special issue on computer arithmetic
Cordic based parallel/pipelined architecture for the Hough transform
Journal of VLSI Signal Processing Systems
High Performance Rotation Architectures Based on the Radix-4 CORDIC Algorithm
IEEE Transactions on Computers
CORDIC Architectures with Parallel Compensation of the Scale Factor
ASAP '95 Proceedings of the IEEE International Conference on Application Specific Array Processors
CORDIC Processor for Variable-Precision Interval Arithmetic
Journal of VLSI Signal Processing Systems
50 years of CORDIC: algorithms, architectures, and applications
IEEE Transactions on Circuits and Systems Part I: Regular Papers
Architectural design and FPGA implementation of radix-4 CORDIC processor
Microprocessors & Microsystems
IEEE Transactions on Circuits and Systems Part I: Regular Papers
Area-time efficient scaling-free CORDIC using generalized micro-rotation selection
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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The compensation of scale factor imposes significant computationoverhead on the CORDIC algorithm. In this paper we present twoalgorithms and the corresponding architectures (one for both rotationand vectoring modes and the other only for rotation mode) toperform the scaling factor compensation in parallel with theclassical CORDIC iterations. With these methods, the scale factorcompensation overhead is reduced to a couple of iterations forany word length. The architectures presented have beenoptimized for conventional and redundant arithmetic.