Digit-Serial Complex-Number Multipliers on FPGAs
Journal of VLSI Signal Processing Systems
Implementing an OFDM Receiver on the RaPiD Reconfigurable Architecture
IEEE Transactions on Computers
Efficient metrics and high-level synthesis for dynamically reconfigurable logic
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Reliable low-power digital signal processing via reduced precision redundancy
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A Combined Approach to High-Level Synthesis for Dynamically Reconfigurable Systems
IEEE Transactions on Computers
Low-complexity FFT/IFFT IP hardware macrocells for OFDM and MIMO-OFDM CMOS transceivers
Microprocessors & Microsystems
An Area Efficient FFT/IFFT Processor for MIMO-OFDM WLAN 802.11n
Journal of Signal Processing Systems
Implementation of OFDM baseband transceiver with dynamic spectrum access for cognitive radio systems
ISCIT'09 Proceedings of the 9th international conference on Communications and information technologies
Design of an application-specific instruction set processor for high-throughput and scalable FFT
Proceedings of the Conference on Design, Automation and Test in Europe
A study on the enhanced detection method considering the channel response in OFDM based WLAN
ICIC'05 Proceedings of the 2005 international conference on Advances in Intelligent Computing - Volume Part II
Parallel pipelined FFT architectures with reduced number of delays
Proceedings of the great lakes symposium on VLSI
Distributed Arithmetic based Split-Radix FFT
Journal of Signal Processing Systems
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This article discusses the VLSI implications of high-speed coded orthogonal frequency-division multiplexing modulation. This is achieved by looking at practical examples of the computational blocks that constitute a COFDM modem and then examining examples of COFDM chips