Modeling and Propagation of Noisy Waveforms in Static Timing Analysis
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Sensitivity-Based Gate Delay Propagation in Static Timing Analysis
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CGTA: current gain-based timing analysis for logic cells
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Cell delay analysis based on rate-of-current change
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Accurate waveform modeling using singular value decomposition with applications to timing analysis
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A robust finite-point based gate model considering process variations
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Integration, the VLSI Journal
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This paper proposes a scheme that captures diverse input waveforms of CMOS gates for static timing analysis (STA). Conventionally latest arrival and transition times are calculated from the timings when a transient waveform goes across predetermined reference voltages. However, this method cannot accurately consider the impact of waveform shape on gate delay when crosstalk-induced nonmonotonic waveforms or inductance-dominant stepwise waveforms are injected. We propose a new timing analysis scheme called "equivalent waveform propagation." The proposed scheme calculates the equivalent waveform that makes the output waveform close to the actual waveform, and uses the equivalent waveform for timing calculation. The proposed scheme can cope with various waveforms affected by resistive shielding, crosstalk noise, wire inductance, etc. In this paper, we devise a method to calculate the equivalent waveform. The proposed calculation method is compatible with conventional methods in gate delay library and characterization and, hence, our method is easily implemented with conventional STA tools.