Genetic algorithm-based FSM synthesis with area-power trade-offs
Integration, the VLSI Journal
A three-step decomposition method for the evolutionary design of sequential logic circuits
Genetic Programming and Evolvable Machines
A formal approach to design space exploration of protocol converters
Proceedings of the Conference on Design, Automation and Test in Europe
Journal of Computer and Systems Sciences International
Area and speed oriented synthesis of FSMs for PAL-based CPLDs
Microprocessors & Microsystems
Peak current reduction by simultaneous state replication and re-encoding
Proceedings of the International Conference on Computer-Aided Design
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This paper presents a finite-state machine (FSM) reengineering method that enhances the FSM synthesis by reconstructing a functionally equivalent but topologically different FSM based on the optimization objective. This method enables the FSM synthesis algorithms to explore a set of functionally equivalent FSMs and obtain better solutions than those in the original FSM. To demonstrate the effectiveness of the proposed method, we apply it to popular power- and area-driven FSM synthesis algorithms, respectively. Our method achieves an average of 5.5% power reduction and 2.7% area reduction, respectively, on 25 Microelectronics Center of North Carolina (MCNC) FSM benchmarks, where the proposed method is applicable. This is a significant performance improvement for the power- and area-driven FSM synthesis algorithms being used. Our method has a negligible run-time overhead, and it maintains the quality of the synthesis solutions.