The Comparison Approach to Multiprocessor Fault Diagnosis
IEEE Transactions on Computers
A Generalized Theory for System Level Diagnosis
IEEE Transactions on Computers
Almost sure fault tolerance in random graphs
SIAM Journal on Computing
Built-In Testing of Integrated Circuit Wafers
IEEE Transactions on Computers
Probability, statistics, and queueing theory with computer science applications
Probability, statistics, and queueing theory with computer science applications
Almost Sure Diagnosis of Almost Every Good Element
IEEE Transactions on Computers
A logic design structure for LSI testability
DAC '77 Proceedings of the 14th Design Automation Conference
Fault detection and diagnosis in multiprocessor systems
Fault detection and diagnosis in multiprocessor systems
Configuration of Locally Spared Arrays in the Presence of Multiple Fault Types
IEEE Transactions on Computers
Correct and Almost Complete Diagnosis of Processor Grids
IEEE Transactions on Computers
Evaluation of a Diagnosis Algorithm for Regular Structures
IEEE Transactions on Computers
Fault-diagnosis of grid structures
Theoretical Computer Science - Dependable computing
Diagnostic Model and Diagnosis Algorithm of a SIMD Computer
EDCC-3 Proceedings of the Third European Dependable Computing Conference on Dependable Computing
Hierarchical Probablistic Diagnosis of MCMs on Large-Area Substrates
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
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A simple diagnosis algorithm is presented for constant degree systems such as rectangular grids connected as tori. The algorithm determines the status of a unit according to the size of its faction, a cluster of units that call each other fault-free but outsiders faulty. Almost all units are correctly identified with this algorithm under a binomial failure distribution even when the probability of failure is rather high. The complexity of the algorithm is $O(n),$ where $n$ is the number of units in a constant degree system. The application of the algorithm to production testing of VLSI chips is also considered. With a test board that houses a large number of chips to be tested, all the chips can be tested in parallel in a way that they test each other and the test outcomes, not necessarily correct, are reported to a host system for analysis. The actual status of each chip is determined by using this new diagnosis algorithm. The above chip screening process can be repeated for higher accuracy. It is shown that no more than two steps are needed in most real situations. Compared with testing by test equipment that usually tests only one chip at a time, the saving of test time and the test equipment cost could be significant with our approach.Index Terms驴Probabilistic diagnosis, system level diagnosis, diagnosis algorithm, production testing, VLSI testing.