Built-In Testing of Integrated Circuit Wafers

  • Authors:
  • Sampath Rangarajan;Donald Fussell;Miroslaw Malek

  • Affiliations:
  • Univ. of Texas at Austin, Austin;Univ. of Texas at Austin, Austin;Univ. of Texas at Austin, Austin

  • Venue:
  • IEEE Transactions on Computers
  • Year:
  • 1990

Quantified Score

Hi-index 15.00

Visualization

Abstract

Production testing of a digital circuit requires the generation of a sequence of tests and their application to the circuit being tested. Currently, in test application, the output of the circuit under test is compared to a known correct output for each test. The method has some drawbacks likely to become more critical in the near future. In homogeneous systems of identical integrated circuits of silicon wafers, testing can be done in another way, i.e. by applying a common test to several processing elements at once and comparing the results produced by them. The authors analyze such schemes and show that they are inherently as accurate as current methods that use assumed correct results for production testing. Since this approach could allow wafers to be tested for production faults significantly more quickly than by using a probe tester, the results indicate that it can provide an attractive alternative to current methods for production testing of silicon wafers.