Synthesis of logic circuits based on negative differential resistance property
EUROCAST'11 Proceedings of the 13th international conference on Computer Aided Systems Theory - Volume Part I
A scalable threshold logic synthesis method using ZBDDs
Proceedings of the great lakes symposium on VLSI
Minimizing area and power of sequential CMOS circuits using threshold decomposition
Proceedings of the International Conference on Computer-Aided Design
Sensitization criterion for threshold logic circuits and its application
Proceedings of the International Conference on Computer-Aided Design
Nanopipelined threshold network synthesis
ACM Journal on Emerging Technologies in Computing Systems (JETC)
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This paper presents a new and efficient heuristic procedure for determining whether or not a given Boolean function is a threshold function, when the Boolean function is given in the form of a decision diagram. The decision diagram based method is significantly different from earlier methods that are based on solving linear inequalities in Boolean variables that derived from truth tables. This method's success depends on the ordering of the variables in the binary decision diagram (BDD). An alternative data structure, and one that is more compact than a BDD, called a max literal factor tree (MLFT) is introduced. An MLFT is a particular type of factoring tree and was found to be more efficient than a BDD for identifying threshold functions. The threshold identification procedure is applied to the MCNC benchmark circuits to synthesize threshold gate networks.