Synchronization barrier and related tools for shared memory parallel programming
International Journal of Parallel Programming
Toward a methodology of optimizing programs for high-performance computers
ICS '93 Proceedings of the 7th international conference on Supercomputing
Performance of the NAS parallel benchmarks on PVM-based networks
Journal of Parallel and Distributed Computing
Using MPI: portable parallel programming with the message-passing interface
Using MPI: portable parallel programming with the message-passing interface
Implementation of an environment for Monte Carlo simulation of fully 3-D positron tomography
Parallel Computing - Special double issue on biomedical applications
A linear space algorithm for computing maximal common subsequences
Communications of the ACM
A hybrid architecture for bioinformatics
Future Generation Computer Systems - Parallel computing technologies (PaCT-2001)
Legacy 4GL Application Migration via Knowledge-Based Software Engineering Technology: A Case Study
ASWEC '97 Proceedings of the Australian Software Engineering Conference
Introduction to the cell multiprocessor
IBM Journal of Research and Development - POWER5 and packaging
Cell broadband engine architecture and its first implementation: a performance view
IBM Journal of Research and Development
Cell/B.E. blades: building blocks for scalable, real-time, interactive, and digital media servers
IBM Journal of Research and Development
Clustal W and Clustal X version 2.0
Bioinformatics
A Bioinfomatics Grid Alignment Toolkit
Future Generation Computer Systems
Recognition of circular patterns on GPUs: Performance analysis and contributions
Journal of Parallel and Distributed Computing
Adapting a message-driven parallel application to GPU-accelerated clusters
Proceedings of the 2008 ACM/IEEE conference on Supercomputing
Programming the Intel 80-core network-on-a-chip terascale processor
Proceedings of the 2008 ACM/IEEE conference on Supercomputing
Parallel Computing Experiences with CUDA
IEEE Micro
An intelligent semi-automatic application porting system for application accelerators
Proceedings of the combined workshops on UnConventional high performance computing workshop plus memory access workshop
IPDPS '09 Proceedings of the 2009 IEEE International Symposium on Parallel&Distributed Processing
Optimizing data intensive GPGPU computations for DNA sequence alignment
Parallel Computing
Eclipse: a platform for integrating development tools
IBM Systems Journal
A Fast Linear-Space Sequence Alignment Algorithm with Dynamic Parallelization Framework
CIT '09 Proceedings of the 2009 Ninth IEEE International Conference on Computer and Information Technology - Volume 02
Next-generation bioinformatics
Bioinformatics
Initial experiences porting a bioinformatics application to a graphics processor
PCI'05 Proceedings of the 10th Panhellenic conference on Advances in Informatics
Model-driven engineering for software migration in a large industrial context
MODELS'07 Proceedings of the 10th international conference on Model Driven Engineering Languages and Systems
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Current trends in computer programming look for solutions in the challenging task of porting and optimizing existing algorithms to many-core architectures with tens of Central Processing Units (CPUs). Yet, the lack of standardized general-purpose parallel programming and porting methodologies represents the main bottleneck on these developments. We have focused on bioinformatics applied to genomics in general and the so-called ''Next-Generation'' Sequencing (NGS) in particular, in order to study the viability and cost of porting and optimizing well known algorithms to a many-core architecture. Three different methods are tackled in order to implement existing algorithms in Tile64, corresponding to a microprocessor containing 64 CPUs, each of them being capable of executing an independent Linux operating system. Three different approaches have been explored: (i) implementation of the Needleman-Wunsch/Smith-Waterman pairwise aligner from scratch; (ii) direct translation of the Message Passing Interface (MPI) C++ ABySS assembly algorithm with changes on the communication layer; and (iii) migration of the ClustalW tool, parallelizing only the most time-consuming stage. The performance-gain/development-cost tradeoffs indicate that the Tile64 microprocessor has the potential to increase the performance of bioinformatics in an unprecedented way for a standalone Personal Computer (PC). Yet, the effective exploitation of these parallel implementations requires a detailed understanding of the peculiar many-core characteristics when migrating previous non-parallel source codes.