Error-control coding for computer systems
Error-control coding for computer systems
Performability Analysis Using Semi-Markov Reward Processes
IEEE Transactions on Computers
Algorithm-Based Fault Tolerance for FFT Networks
IEEE Transactions on Computers
Practical Issues in the Use of ABFT and a New Failure Model
FTCS '98 Proceedings of the The Twenty-Eighth Annual International Symposium on Fault-Tolerant Computing
IOLTS '04 Proceedings of the International On-Line Testing Symposium, 10th IEEE
Reliable low-power digital signal processing via reduced precision redundancy
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Characterization of Soft Errors Caused by Single Event Upsets in CMOS Processes
IEEE Transactions on Dependable and Secure Computing
Algorithm-Based Fault Tolerance for Matrix Operations
IEEE Transactions on Computers
Closed-Form Solutions of Performability
IEEE Transactions on Computers
Reliability analysis of phased-mission systems: a practical approach
RAMS '06 Proceedings of the RAMS '06. Annual Reliability and Maintainability Symposium, 2006.
International Journal of High Performance Computing Applications
Characterization of Fixed and Reconfigurable Multi-Core Devices for Application Acceleration
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Realizing Low-Cost High-Throughput General-Purpose Block Encoder for JPEG2000
IEEE Transactions on Circuits and Systems for Video Technology
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Commercial SRAM-based, field-programmable gate arrays (FPGAs) have the potential to provide space applications with the necessary performance to meet next-generation mission requirements. However, mitigating an FPGA’s susceptibility to single-event upset (SEU) radiation is challenging. Triple-modular redundancy (TMR) techniques are traditionally used to mitigate radiation effects, but TMR incurs substantial overheads such as increased area and power requirements. In order to reduce these overheads while still providing sufficient radiation mitigation, we propose a reconfigurable fault tolerance (RFT) framework that enables system designers to dynamically adjust a system’s level of redundancy and fault mitigation based on the varying radiation incurred at different orbital positions. This framework includes an adaptive hardware architecture that leverages FPGA reconfigurable techniques to enable significant processing to be performed efficiently and reliably when environmental factors permit. To accurately estimate upset rates, we propose an upset rate modeling tool that captures time-varying radiation effects for arbitrary satellite orbits using a collection of existing, publically available tools and models. We perform fault-injection testing on a prototype RFT platform to validate the RFT architecture and RFT performability models. We combine our RFT hardware architecture and the modeled upset rates using phased-mission Markov modeling to estimate performability gains achievable using our framework for two case-study orbits.