The SPLASH-2 programs: characterization and methodological considerations
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
Embra: fast and flexible machine simulation
Proceedings of the 1996 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
The SimpleScalar tool set, version 2.0
ACM SIGARCH Computer Architecture News
Optimistic distributed timed cosimulation based on thread simulation model
Proceedings of the 6th international workshop on Hardware/software codesign
A retargetable, ultra-fast instruction set simulator
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Performance improvement of multi-processor systems cosimulation based on SW analysis
Proceedings of the conference on Design, automation and test in Europe
A universal technique for fast and flexible instruction-set architecture simulation
Proceedings of the 39th annual Design Automation Conference
System Design with SystemC
Linkers and Loaders
Parallel simulation: parallel and distributed simulation systems
Proceedings of the 33nd conference on Winter simulation
An ultra-fast instruction set simulator
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Instruction set compiled simulation: a technique for fast and flexible instruction set simulation
Proceedings of the 40th annual Design Automation Conference
Automatic Synthesis of High-Speed Processor Simulators
Proceedings of the 37th annual IEEE/ACM International Symposium on Microarchitecture
Cycle Accurate Binary Translation for Simulation Acceleration in Rapid Prototyping of SoCs
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Trace-driven HW/SW cosimulation using virtual synchronization technique
Proceedings of the 42nd annual Design Automation Conference
A retargetable framework for instruction-set architecture simulation
ACM Transactions on Embedded Computing Systems (TECS)
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
QEMU, a fast and portable dynamic translator
ATEC '05 Proceedings of the annual conference on USENIX Annual Technical Conference
High-performance timing simulation of embedded software
Proceedings of the 45th annual Design Automation Conference
An effective synchronization approach for fast and accurate multi-core instruction-set simulation
EMSOFT '09 Proceedings of the seventh ACM international conference on Embedded software
Exploiting Simulation Slack to Improve Parallel Simulation Speed
ICPP '09 Proceedings of the 2009 International Conference on Parallel Processing
Proceedings of the Conference on Design, Automation and Test in Europe
A flexible hybrid simulation platform targeting multiple configurable processors SoC
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Source-level timing annotation for fast and accurate TLM computation model generation
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
A universal technique for fast and flexible instruction-set architecture simulation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Proceedings of the Conference on Design, Automation and Test in Europe
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As multi-core architecture has become the mainstream, the corresponding multi-core instruction-set simulation (MCISS) is also needed to aid system development. Ideally, we may run a MCISS in parallel to enhance the simulation speed. However, the conventional centralized timing synchronization mechanism would greatly constrain the parallelism of a MCISS, so the simulation speed is bounded. To resolve this issue, we propose a new distributed timing synchronization technique which allows higher parallelism for a MCISS. Hence, it accelerates the simulation speed by 9 to 20 times as the number of cores increases in contrast to the centralized synchronization approach.