Optimized Communication Architecture of MPSoCs with a Hardware Scheduler: A System-Level Analysis

  • Authors:
  • Gerd Ascheid;Rainer Leupers;Diandian Zhang;Han Zhang;Jeronimo Castrillon;Torsten Kempf;Bart Vanthournout

  • Affiliations:
  • RWTH Aachen University, Germany;RWTH Aachen University, Germany;RWTH Aachen University, Germany;RWTH Aachen University, Germany;RWTH Aachen University, Germany;RWTH Aachen University, Germany;Synopsys Inc., Belgium

  • Venue:
  • International Journal of Embedded and Real-Time Communication Systems
  • Year:
  • 2011

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Abstract

Efficient runtime resource management in multi-processor systems-on-chip MPSoCs for achieving high performance and low energy consumption is one of the key challenges for system designers. OSIP, an operating system application-specific instruction-set processor, together with its well-defined programming model, provides a promising solution. It delivers high computational performance to deal with dynamic task scheduling and mapping. Being programmable, it can easily be adapted to different systems. However, the distributed computation among the different processing elements introduces complexity to the communication architecture, which tends to become the bottleneck of such systems. In this work, the authors highlight the vital importance of the communication architecture for OSIP-based systems and optimize the communication architecture. Furthermore, the effects of OSIP and the communication architecture are investigated jointly from the system point of view, based on a broad case study for a real life application H.264 and a synthetic benchmark application.