A Hardware-Software Real-Time Operating System Framework for SoCs
IEEE Design & Test
FASTCHART-Idea and Implementation
ICCD '91 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
System-on-chip beyond the nanometer wall
Proceedings of the 40th annual Design Automation Conference
Hardware implementation of a real-time operating system
TRON '95 Proceedings of the The 12th TRON Project International Symposium, 1995
Application of a Multi-Processor SoC Platform to High-Speed Packet Forwarding
Proceedings of the conference on Design, automation and test in Europe - Volume 3
The future of multiprocessor systems-on-chips
Proceedings of the 41st annual Design Automation Conference
Heterogeneous MP-SoC: the solution to energy-efficient signal processing
Proceedings of the 41st annual Design Automation Conference
The energy efficiency of CMP vs. SMT for multimedia workloads
Proceedings of the 18th annual international conference on Supercomputing
Cooperative multithreading on 3mbedded multiprocessor architectures enables energy-scalable design
Proceedings of the 42nd annual Design Automation Conference
Hardware/software partitioning of operating systems: a behavioral synthesis approach
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
A Safari Through the MPSoC Run-Time Management Jungle
Journal of Signal Processing Systems
Hardware-assisted security enhanced Linux in embedded systems: a proposal
WESS '10 Proceedings of the 5th Workshop on Embedded Systems Security
EURASIP Journal on Embedded Systems
Using hardware support for scheduling with ada
Ada-Europe'10 Proceedings of the 15th Ada-Europe international conference on Reliable Software Technologies
Optimized Communication Architecture of MPSoCs with a Hardware Scheduler: A System-Level Analysis
International Journal of Embedded and Real-Time Communication Systems
ARCS'13 Proceedings of the 26th international conference on Architecture of Computing Systems
Hi-index | 0.00 |
In this paper we propose a hardware real time operating system (HW-RTOS) that implements the OS layer in a dual-processor SMP architecture. Intertask communication is specified by means of dedicated APIs and the HW-RTOS takes care of the communication requirements of the application and also implements the task scheduling algorithm. The HW-RTOS allows to have smaller footprints, since it avoids the need to link to the final executables traditional software RTOS libraries. Moreover, the HW-RTOS is able to exploit the easy task migration feature provided by an SMP architecture much more efficiently than a traditional software RTOS, due to its faster execution and we show how this significantly overcomes the performance achievable with optimal static task partitioning among two processors. Preliminary results show that the hardware overhead in a dual processor architecture is less than 20K gates.