Efficient and correct execution of parallel programs that share memory
ACM Transactions on Programming Languages and Systems (TOPLAS)
CheckFence: checking consistency of concurrent data types on relaxed memory models
Proceedings of the 2007 ACM SIGPLAN conference on Programming language design and implementation
Reasoning about the implementation of concurrency abstractions on x86-TSO
ECOOP'10 Proceedings of the 24th European conference on Object-oriented programming
An automata-based symbolic approach for verifying programs on relaxed memory models
SPIN'10 Proceedings of the 17th international SPIN conference on Model checking software
Partial-coherence abstractions for relaxed memory models
Proceedings of the 32nd ACM SIGPLAN conference on Programming language design and implementation
Automatic inference of memory fences
Proceedings of the 2010 Conference on Formal Methods in Computer-Aided Design
A verification-based approach to memory fence insertion in relaxed memory systems
Proceedings of the 18th international SPIN conference on Model checking software
A memory model sensitive checker for c#
FM'06 Proceedings of the 14th international conference on Formal Methods
Counter-Example guided fence insertion under TSO
TACAS'12 Proceedings of the 18th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Automatic fence insertion in integer programs via predicate abstraction
SAS'12 Proceedings of the 19th international conference on Static Analysis
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We introduce Memorax, a tool for the verification of control state reachability (i.e., safety properties) of concurrent programs manipulating finite range and integer variables and running on top of weak memory models. The verification task is non-trivial as it involves exploring state spaces of arbitrary or even infinite sizes. Even for programs that only manipulate finite range variables, the sizes of the store buffers could grow unboundedly, and hence the state spaces that need to be explored could be of infinite size. In addition, Memorax incorporates an interpolation based CEGAR loop to make possible the verification of control state reachability for concurrent programs involving integer variables. The reachability procedure is used to automatically compute possible memory fence placements that guarantee the unreachability of bad control states under TSO. In fact, for programs only involving finite range variables and running on TSO, the fence insertion functionality is complete, i.e., it will find all minimal sets of memory fence placements (minimal in the sense that removing any fence would result in the reachability of the bad control states). This makes Memorax the first freely available, open source, push-button verification and fence insertion tool for programs running under TSO with integer variables.