Random early detection gateways for congestion avoidance
IEEE/ACM Transactions on Networking (TON)
Small forwarding tables for fast routing lookups
SIGCOMM '97 Proceedings of the ACM SIGCOMM '97 conference on Applications, technologies, architectures, and protocols for computer communication
The BLUE active queue management algorithms
IEEE/ACM Transactions on Networking (TON)
Controlling High-Bandwidth Flows at the Congested Router
ICNP '01 Proceedings of the Ninth International Conference on Network Protocols
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable embedded systems: Synthesis, design and application
Effective RED: An algorithm to improve RED's performance by reducing packet loss rate
Journal of Network and Computer Applications
High-speed networks: definition and fundamental attributes
Computer Communications
A robust active queue management algorithm in large delay networks
Computer Communications
A framework for optimizing the cost and performance of next-generation IP routers
IEEE Journal on Selected Areas in Communications
Matching output queueing with a combined input/output-queued switch
IEEE Journal on Selected Areas in Communications
Design of packet-fair queuing schedulers using a RAM-based searching engine
IEEE Journal on Selected Areas in Communications
Implementing scheduling algorithms in high-speed networks
IEEE Journal on Selected Areas in Communications
Algorithms for packet classification
IEEE Network: The Magazine of Global Internetworking
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Multimedia services such as IPTV and video conferencing constitute a substantial portion of the traffic sources in new communication systems requiring high-speed IP switching. This paper presents a scalable architecture for a high-performance IP switch based on Priority Active Queue Management (PAQM), which provides multimedia services with improved quality of service (QoS) in the communication system. Better QoS, in terms of delay, throughput, and loss rate, can be provided by a packet scheduling technique and a buffer management architecture for packet switching networks. The proposed architecture consists of a PAQM with a dedicated memory management data structure based on circular linked lists. The linked lists include different priority levels in a pipelined organization for the management of active queues. The architecture also scales dynamically to support a large number of priority levels and a large queue size. A performance analysis of an optimized PAQM algorithm is presented using an NS-2 network simulator to evaluate the capacity of the IP switch to support QoS. The results show that this system can achieve the maximum throughput with low levels of delay. To achieve high performance, we have implemented the proposed algorithm using 0.35-@mm CMOS technology, the performance of which is subsequently analyzed.