IBM Parallel Sysplex design for the IBM z196 system

Authors:
R. Dorsch;R. K. Errickson;M. M. Helms;G. Crew;T. A. Gregg;W. Haileselassie;L. W. Helmer;A. Kohler;K. Pandey;S. Roscher;E. S. Rotter;C. Haubelt
Affiliations:
IBM Systems and Technology Group, IBM Deutschland Research & Development GmbH, Boeblingen, Germany;IBM Systems and Technology Group, Poughkeepsie, NY;IBM Systems and Technology Group, IBM Deutschland Research & Development GmbH, Boeblingen, Germany;IBM Systems and Technology Group, Poughkeepsie, NY;IBM Systems and Technology Group, Poughkeepsie, NY;IBM Systems and Technology Group, Poughkeepsie, NY;IBM Systems and Technology Group, Poughkeepsie, NY;IBM Systems and Technology Group, IBM Deutschland Entwicklung GmbH, Boeblingen, Germany;IBM Systems and Technology Group, Poughkeepsie, NY;IBM Systems and Technology Group, IBM Deutschland Research and Development GmbH, Boeblingen, Germany;IBM Systems and Technology Group, Poughkeepsie, NY;University of Erlangen-Nuremberg, Erlangen, Germany
Venue:
IBM Journal of Research and Development
Year:
2012

Citing 12
Cited 1

S/390 cluster technology: Parallel Sysplex

IBM Systems Journal
Cluster architectures and S/390 Parallel Sysplex scalability

IBM Systems Journal
IBM Parallel Sysplex clustering: technology options for continuous availability

IBM Systems Journal
The integrated cluster bus for the IBM S/390 parallel Sysplex

IBM Journal of Research and Development
Self-timed interface for S/390 I/O subsystem interconnection

IBM Journal of Research and Development
Coupling I/O channels for the IBM eServer z900: reengineering required

IBM Journal of Research and Development
Hyper-acceleration and HW/SW co-verification as an essential part of IBM eServer z900 verification

IBM Journal of Research and Development
z/CECSIM: an efficient and comprehensive microcode simulator for the IBM eServer z900

IBM Journal of Research and Development
IBM system z10 I/O subsystem

IBM Journal of Research and Development
Design and verification of the IBM system z10 I/O subsystem chips

IBM Journal of Research and Development
Efficient high-level modeling in the networking domain

Proceedings of the Conference on Design, Automation and Test in Europe
Overview of IBM zEnterprise 196 I/O subsystem with focus on new PCI express infrastructure

IBM Journal of Research and Development

Overview of IBM zEnterprise 196 I/O subsystem with focus on new PCI express infrastructure

IBM Journal of Research and Development

Quantified Score

Hi-index	0.00

Visualization

Abstract

The coupling adapter hub of an IBM System z® server is a key component for the IBM System z Parallel Sysplex®. The hub is built to exchange messages between systems in a highly efficient manner. This paper describes the latest generation of high-fanout and low-latency coupling adapter cards, the associated firmware, and a new protocol. As in the z10® system, there is a long-range and a short-distance card. The coupling adapter for zEnterprise® 196 (z196) is based on the z10 infrastructure (InfiniBand® link layer), with the internal transport engine for message handling completely redesigned to support the new protocol and improve connectivity, latency, and throughput. In addition to enabling the new adapter's functionality, the Parallel Sysplex support firmware has several significant enhancements in a number of functional areas. Connectivity and utilization are improved through the ability to define more channels and more concurrent connections (message buffer sets) for each channel. Through a combination of hardware and firmware protocols, response time for messages at a short distance is significantly improved. Finally, new methods are presented that support efficient presilicon and postsilicon functional and performance verification.