Voltage driven nondestructive self-reference sensing scheme of spin-transfer torque memory

  • Authors:
  • Zhenyu Sun;Hai Li;Yiran Chen;Xiaobin Wang

  • Affiliations:
  • Department of Electrical and Computer Engineering, Polytechnic Institute of New York University, Brooklyn, NY;Department of Electrical and Computer Engineering, Polytechnic Institute of New York University, Brooklyn, NY;Department of Electrical and Computer Engineering, University of Pittsburgh, Pittsburgh, PA;Seagate Technology, Bloomington, MN

  • Venue:
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • Year:
  • 2012

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Abstract

Spin-transfer torque random access memory (STT-RAM) has demonstrated great potentials as a universal memory for its fast access speed, zero standby power, excellent scalability, and simplicity of cell structure. However, large process variations of both magnetic tunneling junction (MTJ) and CMOS process severely limit the yield of STT-RAM chips and prevent the massive production from happening. In this paper, we analyze and compare the impacts of process variations on various sensing schemes of STT-RAM design. On top of it, we propose a novel voltage-driven nondestructive self-reference sensing scheme to enhance the STT-RAM chip yield by significantly improving sense margin. Monte Carlo simulations of a 16-Kb STT-RAM array shows that our proposed scheme can achieve the same yield as the previous nondestructive self-reference sensing scheme while improving the sense margin by five times with the similar access performance and power.