Input vector monitoring on line concurrent BIST based on multilevel decoding logic

Authors:
Ioannis Voyiatzis
Affiliations:
Technological Educational Institute of Athens, Greece
Venue:
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Year:
2012

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Abstract

Input Vector Monitoring Concurrent Built-In Self Test (BIST) schemes provide the capability to perform testing while the Circuit Under Test (CUT) operates normally, by exploiting vectors that appear at the inputs of the CUT during its normal operation. In this paper a novel input vector monitoring concurrent BIST scheme is presented, that reduces considerably the imposed hardware overhead compared to previously proposed schemes.