Communication and concurrency
A process algebra interpretation of a verification oriented overlanguage of VHDL
EURO-DAC '94 Proceedings of the conference on European design automation
Proof theory and a validation condition generator for VHDL
EURO-DAC '94 Proceedings of the conference on European design automation
Formal Methods in System Design - Special issue on VHDL semantics
An axiomatic basis for computer programming
Communications of the ACM
A Calculus of Communicating Systems
A Calculus of Communicating Systems
Formal Semantics for VHDL
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