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Protocols and Architectures for Wireless Sensor Networks
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IEEE Transactions on Computers
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SS'08 Proceedings of the 17th conference on Security symposium
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NSWCTC '09 Proceedings of the 2009 International Conference on Networks Security, Wireless Communications and Trusted Computing - Volume 02
Faster addition and doubling on elliptic curves
ASIACRYPT'07 Proceedings of the Advances in Crypotology 13th international conference on Theory and application of cryptology and information security
Modern Computer Arithmetic
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CHES'06 Proceedings of the 8th international conference on Cryptographic Hardware and Embedded Systems
A systematic evaluation of compact hardware implementations for the rijndael s-box
CT-RSA'05 Proceedings of the 2005 international conference on Topics in Cryptology
Finding collisions in the full SHA-1
CRYPTO'05 Proceedings of the 25th annual international conference on Advances in Cryptology
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Personal and Ubiquitous Computing
Extending ECC-based RFID authentication protocols to privacy-preserving multi-party grouping proofs
Personal and Ubiquitous Computing
Strengthening digital signatures via randomized hashing
CRYPTO'06 Proceedings of the 26th annual international conference on Advances in Cryptology
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Security was not considered when current wireless sensor nodes were designed. As a result, providing high level of security on current WSNs platforms is unattainable, especially against attacks based on key resolving and node compromise. In this paper, we scrutinize the security holes in current WSNs platforms and compare the main approaches to implementing their cryptographic primitives in terms of security, time, and energy efficiency. To secure these holes and provide more efficiency, we propose SN-SEC, a 32-bit RISC secure wireless sensor platform with hardware cryptographic primitives. The choice of cryptographic primitives for SN-SEC is based on their compatibility with the constrained nature of WSNs and their security. SN-SEC is implemented using very high-speed integrated circuit hardware description language. Experimental results using synthesis for Spartan-6 low-power FPGA show that the proposed design has a very reasonable computational time and energy consumption compared to well-known WSN processers.