A method for obtaining digital signatures and public-key cryptosystems
Communications of the ACM
A Discipline of Programming
A cryptographic library for the Motorola DSP56000
EUROCRYPT '90 Proceedings of the workshop on the theory and application of cryptographic techniques on Advances in cryptology
VICTOR: an efficient RSA hardware implementation
EUROCRYPT '90 Proceedings of the workshop on the theory and application of cryptographic techniques on Advances in cryptology
Architectural tradeoff in implementing RSA processors
ACM SIGARCH Computer Architecture News
IEEE Micro
Comparison of Three Modular Reduction Functions
CRYPTO '93 Proceedings of the 13th Annual International Cryptology Conference on Advances in Cryptology
PKC '01 Proceedings of the 4th International Workshop on Practice and Theory in Public Key Cryptography: Public Key Cryptography
Fast Implementation of Public-Key Cryptography ona DSP TMS320C6201
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
Montgomery Exponentiation with no Final Subtractions: Improved Results
CHES '00 Proceedings of the Second International Workshop on Cryptographic Hardware and Embedded Systems
High-Speed RSA Hardware Based on Barret's Modular Reduction Method
CHES '00 Proceedings of the Second International Workshop on Cryptographic Hardware and Embedded Systems
A Bit-Serial Unified Multiplier Architecture for Finite Fields GF(p) and GF(2m)
CHES '01 Proceedings of the Third International Workshop on Cryptographic Hardware and Embedded Systems
Increasing the Bitlength of a Crypto-Coprocessor
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
Security on FPGAs: State-of-the-art implementations and attacks
ACM Transactions on Embedded Computing Systems (TECS)
Low-Weight Polynomial Form Integers for Efficient Modular Multiplication
IEEE Transactions on Computers
A protected division algorithm
CARDIS'02 Proceedings of the 5th conference on Smart Card Research and Advanced Application Conference - Volume 5
Fast Firmware Implementation of RSA-Like Security Protocol for Mobile Devices
Wireless Personal Communications: An International Journal
Applications of fast truncated multiplication in cryptography
EURASIP Journal on Embedded Systems
Implementing public-key infrastructure for sensor networks
ACM Transactions on Sensor Networks (TOSN)
Efficient Modular Arithmetic in Adapted Modular Number System Using Lagrange Representation
ACISP '08 Proceedings of the 13th Australasian conference on Information Security and Privacy
Modular Reduction in GF(2n) without Pre-computational Phase
WAIFI '08 Proceedings of the 2nd international workshop on Arithmetic of Finite Fields
Faster $\mathbb{F}_p$-Arithmetic for Cryptographic Pairings on Barreto-Naehrig Curves
CHES '09 Proceedings of the 11th International Workshop on Cryptographic Hardware and Embedded Systems
Simulations of modular multipliers on FPGA
AsiaMS '07 Proceedings of the IASTED Asian Conference on Modelling and Simulation
INDOCRYPT '09 Proceedings of the 10th International Conference on Cryptology in India: Progress in Cryptology
Efficient and formally proven reduction of large integers by small moduli
ACM Transactions on Mathematical Software (TOMS)
New modular multiplication algorithms for fast modular exponentiation
EUROCRYPT'96 Proceedings of the 15th annual international conference on Theory and application of cryptographic techniques
An improved fast signature scheme without online multiplication
FC'02 Proceedings of the 6th international conference on Financial cryptography
Fast Reconfigurable Elliptic Curve Cryptography Acceleration for GF(2m) on 32 bit Processors
Journal of Signal Processing Systems
Toward acceleration of RSA using 3D graphics hardware
Cryptography and Coding'07 Proceedings of the 11th IMA international conference on Cryptography and coding
Compiler assisted elliptic curve cryptography
OTM'07 Proceedings of the 2007 OTM confederated international conference on On the move to meaningful internet systems: CoopIS, DOA, ODBASE, GADA, and IS - Volume Part II
Dual-residue montgomery multiplication
NPC'07 Proceedings of the 2007 IFIP international conference on Network and parallel computing
Improving multiplication and reminder using implementation based on word and index
Proceedings of the 1st Amrita ACM-W Celebration on Women in Computing in India
Speeding up bipartite modular multiplication
WAIFI'10 Proceedings of the Third international conference on Arithmetic of finite fields
Revisiting sum of residues modular multiplication
Journal of Electrical and Computer Engineering
Modular number systems: beyond the mersenne family
SAC'04 Proceedings of the 11th international conference on Selected Areas in Cryptography
A fast RSA implementation on itanium 2 processor
ICICS'06 Proceedings of the 8th international conference on Information and Communications Security
ANTS'06 Proceedings of the 7th international conference on Algorithmic Number Theory
Fast truncated multiplication for cryptographic applications
CHES'05 Proceedings of the 7th international conference on Cryptographic hardware and embedded systems
Redundant modular reduction algorithms
CARDIS'11 Proceedings of the 10th IFIP WG 8.8/11.2 international conference on Smart Card Research and Advanced Applications
INDOCRYPT'11 Proceedings of the 12th international conference on Cryptology in India
Efficient java implementation of elliptic curve cryptography for J2ME-Enabled mobile devices
WISTP'12 Proceedings of the 6th IFIP WG 11.2 international conference on Information Security Theory and Practice: security, privacy and trust in computing systems and ambient intelligent ecosystems
SN-SEC: a secure wireless sensor platform with hardware cryptographic primitives
Personal and Ubiquitous Computing
Hi-index | 0.00 |
A description of the techniques employed at Oxford University to obtain a high speed implementation of the RSA encryption algorithm on an "off-the-shelf" digital signal processing chip. Using these techniques a two and a half second (average) encrypt time (for 512 bit exponent and modulus) was achieved on a first generation DSP (The Texas Instruments TMS 32010) and times below one second are achievable on second generation parts. Furthermore the techniques of algorithm development employed lead to a provably correct implementation.