Broadcast electrode-addressing for pin-constrained multi-functional digital microfluidic biochips
Proceedings of the 45th annual Design Automation Conference
ILP-based pin-count aware design methodology for microfluidic biochips
Proceedings of the 46th Annual Design Automation Conference
A correct network flow model for escape routing
Proceedings of the 46th Annual Design Automation Conference
Co-optimization of droplet routing and pin assignment in disposable digital microfluidic biochips
Proceedings of the 2011 international symposium on Physical design
Proceedings of the 48th Design Automation Conference
Proceedings of the International Conference on Computer-Aided Design
A network-flow based pin-count aware routing algorithm for broadcast electrode-addressing EWOD chips
Proceedings of the International Conference on Computer-Aided Design
Digital microfluidic biochips: a vision for functional diversity and more than Moore
Proceedings of the International Conference on Computer-Aided Design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Voltage-aware chip-level design for reliability-driven pin-constrained EWOD chips
Proceedings of the International Conference on Computer-Aided Design
Proceedings of the 50th Annual Design Automation Conference
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Nowadays, electrowetting-on-dielectric (EWOD) chips have become the most popular actuator for droplet-based digital microfluidic biochips. As the complexity of biochemical assay increases, the chip-level design of EWOD chips which integrates electrode addressing and wire routing are widely adopted. Furthermore, to finish many time-sensitive bioassays such as incubation and emerging flash chemistry in a specific time, a high-frequency EWOD is used to satisfy the demand. However, the reliability of the EWOD chip degrades due to the contact angle reduction problem incurred by huge number of switching times of an electrode. Thus, the reliability issue, electrode addressing, and wire routing problem should be considered together in the chip-level design of an EWOD chips. In this paper, a graph-based chip-level design algorithm is presented. By setting the switching-time constraint, the number of switching times can be limited to minimize the impact of contact angle reductions problem. Also, a progressive addressing and routing approach is proposed to overcome the challenge of complex wire routing problem. Experimental results show that the influence of contact angle reduction problem can be effectively minimized by proposed algorithm. A reliable chip-level design with feasible wire routing solution can be generated with number of pins are satisfied.