HMTT: A hybrid hardware/software tracing system for bridging the DRAM access trace's semantic gap

  • Authors:

  • Yongbing Huang;Licheng Chen;Zehan Cui;Yuan Ruan;Yungang Bao;Mingyu Chen;Ninghui Sun

  • Affiliations:

  • State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences, China/ University of Chinese Academy of Sciences, Beijing, China;State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences, China/ University of Chinese Academy of Sciences, Beijing, China;State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences, China/ University of Chinese Academy of Sciences, Beijing, China;State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China;State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China;State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China;State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China

  • Venue:
  • ACM Transactions on Architecture and Code Optimization (TACO)
  • Year:
  • 2014

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Abstract

DRAM access traces (i.e., off-chip memory references) can be extremely valuable for the design of memory subsystems and performance tuning of software. Hardware snooping on the off-chip memory interface is an effective and nonintrusive approach to monitoring and collecting real-life DRAM accesses. However, compared with software-based approaches, hardware snooping approaches typically lack semantic information, such as process/function/object identifiers, virtual addresses, and lock contexts, that is essential to the complete understanding of the systems and software under investigation. In this article, we propose a hybrid hardware/software mechanism that is able to collect off-chip memory reference traces with semantic information. We have designed and implemented a prototype system called HMTT (Hybrid Memory Trace Tool), which uses a custom-made DIMM connector to collect off-chip memory references and a high-level event-encoding scheme to correlate semantic information with memory references. In addition to providing complete, undistorted DRAM access traces, the proposed system is also able to perform various types of low-overhead profiling, such as object-relative accesses and multithread lock accesses.